WP2 - Architecture Specification

Deliverable D2.1 - Architecture and Components Integration

Adrian Matellanes

Sergio Sez

Patricia Balbastre

Luca Abeni

Pavel Pisa

Frantisek Vacek

Petr Smolik

Zdenek Sebek

Jan Krakora

Zdenek Hanzalek

Agnes Lanusse


Table of Contents
I. Architecture
1. Introduction
2. Software Architecture
A Tale of two Levels
OCERA Kernel
OCERA Framework
Components
3. Hardware Architecture
x86
PowerPC
StrongArm
Hardware Bibliography
4. Embedded system generation
II. Components Specification
5. Kernel Components
Introduction
Kernel Components Architecture
Kernel Components Description
6. Quality of Service Components
7. Components for fault-tolerance
Introduction
Tools and components to be developed
Components and tools descriptions
8. Communications Components
The Real-Time Ethernet Architecture
RT-CANopen architecture
Verification of Distrubuted Systems
List of Tables
1. Project Co-ordinator
2. Participant List
3. Document Version
8-1. Publication parameters
8-2. Subscription parameters
List of Figures
2-1. Hard Real-Time applications
2-2. Soft Real-Time applications
2-3. Hard & Soft Real-Time applications
4-1. Emdebian Tool Screenshot
5-1. Kernel components
8-1. Client-server model
8-2. Publish-subscribe model
8-3. RTPS timing parameters
8-4. ORTE layers
8-5. ORTE structure
8-6. Database example for two publishers and one subscriber
8-7. ORTE processes
8-8. RT-Linux space VCA usage
8-9. User space VCA usage
8-10. CAN bus substituting layer with VCA
8-11. RT-CANopen slave architecture
8-12. User space OD slave architecture
8-13. Kernel space OD slave architecture
8-14. RT-CANopen master architecture
8-15. Real time control system structure with denotation of computation/communication times